Cristofaro Mune and Niek Timmers presented a seminar on bypassing unbreakable crypto using fault injection on Espressif ESP32 chips. The presentation detailed how the hardware-based Encrypted Secure Boot implementation of the ESP32 SoC was bypassed using a single EM glitch, without knowing the decryption key. This attack exploited multiple hardware vulnerabilities, enabling arbitrary code execution and extraction of plain-text data from external flash. Why it matters: The research highlights critical security vulnerabilities in embedded systems and the potential for fault injection attacks to bypass secure boot mechanisms, necessitating stronger hardware-level security measures.
The Secure Systems Research Center (SSRC) has partnered with the University of New South Wales (UNSW Sydney) to research enhancements and scaling of the seL4 microkernel on edge devices. The collaboration aims to extend the seL4 microkernel to support dynamic virtualization, combining minimal trusted computing base with strong isolation. This will address challenges related to heterogeneous hardware, software, and environmental factors in edge computing. Why it matters: This partnership aims to improve the security of edge devices in critical sectors, addressing vulnerabilities in cyber-physical and autonomous systems.
Researchers at ETH Zurich have formalized models of the EMV payment protocol using the Tamarin model checker. They discovered flaws allowing attackers to bypass PIN requirements for high-value purchases on EMV cards like Mastercard and Visa. The team also collaborated with an EMV consortium member to verify the improved EMV Kernel C-8 protocol. Why it matters: This research highlights the importance of formal methods in identifying critical vulnerabilities in widely used payment systems, potentially impacting financial security for consumers in the GCC region and worldwide.
KAUST researchers have designed an integrated circuit logic lock to protect electronic devices from cyberattacks. The protective logic locks are based on spintronics and can be incorporated into electronic chips. The lock uses a magnetic tunnel junction (MTJ) where the keys are stored in tamper-proof memory, ensuring hardware security. Why it matters: This hardware-based security feature could significantly increase confidence in globalized integrated circuit manufacturing, protecting against counterfeiting and malicious modifications.
The Secure Systems Research Center (SSRC) has obtained membership in the seL4 Foundation. This membership allows SSRC to participate in and contribute to the open-source development of seL4, a formally verified microkernel OS. SSRC aims to research, contribute to, and advance next-generation high-end edge device environments using seL4's capabilities. Why it matters: This move enhances the UAE's capabilities in developing secure and resilient edge computing solutions, fostering innovation in critical sectors like secure communications and drone technology.
TII's Secure Systems Research Center (SSRC) has joined Dronecode, a Linux Foundation non-profit, to enhance UAV security. SSRC will contribute to Dronecode's Security SIG, focusing on cryptography, memory protection, and code analysis for the Pixhawk autopilot hardware and PX4 software. SSRC aims to develop and share security and resilience capabilities for the open UAV platform. Why it matters: This partnership enhances the security of drone systems, addressing potential privacy, cybersecurity, and safety threats in line with the UAE's focus on secure autonomous systems.
Technology Innovation Institute’s (TII) Secure Systems Research Center (SSRC) has joined the Confidential Computing Consortium (CCC). The CCC aims to accelerate the adoption of confidential computing through hardware-based Trusted Execution Environment (TEE) technologies. SSRC will contribute to standardizing hardware-level security capabilities, particularly for secure RISC-V solutions. Why it matters: This partnership strengthens the UAE's position in cyber-physical systems security by enhancing data protection during processing, an area often overlooked in conventional infrastructure.
Conor McMenamin from Universitat Pompeu Fabra presented a seminar on State Machine Replication (SMR) without honest participants. The talk covered the limitations of current SMR protocols and introduced the ByRa model, a framework for player characterization free of honest participants. He then described FAIRSICAL, a sandbox SMR protocol, and discussed how the ideas could be extended to real-world protocols, with a focus on blockchains and cryptocurrencies. Why it matters: This research on SMR protocols and their incentive compatibility could lead to more robust and secure blockchain technologies in the region.